ARCHITECTURE a OF lock IS
COMPONENT keyboard
PORT (
CLK : IN STD_LOGIC ; --system original clock
KEY_IN : IN STD_LOGIC_VECTOR (3 downto 0) ; --KEY IN button code
CLK_SCAN : OUT STD_LOGIC_VECTOR (3 downto 0) ; --scan sequence
OUT_NUMB : OUT STD_LOGIC_VECTOR(3 downto 0) ;
OUT_FUNC : OUT STD_LOGIC_VECTOR(7 downto 0) ;
FLAG_NUMB : OUT STD_LOGIC ;
FLAG_Func : OUT STD_LOGIC
);
END COMPONENT ;
COMPONENT display
PORT (
CLK : in STD_LOGIC; --system clock
ACC : in STD_LOGIC_VECTOR (15 downto 0); --digit data 4 numbers
SEGOUT : OUT STD_LOGIC_VECTOR(7 DOWNTO 0); -- SEG7 Display O/P
SELOUT : OUT STD_LOGIC_VECTOR(3 DOWNTO 0) -- Select SEG7 O/P
);
END COMPONENT ;
SIGNAL BU_1 : STD_LOGIC_VECTOR(3 downto 0) ; --OUT_NUMB
SIGNAL BU_2 : STD_LOGIC_VECTOR(6 downto 0) ; --OUT_FUNC
SIGNAL BU_3 : STD_LOGIC ; --FLAG_NUMB
SIGNAL BU_4 : STD_LOGIC ; --FLAG_FUNC
SIGNAL BU_5 : STD_LOGIC ; --ACC
SIGNAL BU_6 : STD_LOGIC ; --C_DISPLAY
-- SIGNAL BU_7 : STD_LOGIC_VECTOR (15 DOWNTO 0) ; --C_DEBOUNCE
-- SIGNAL BU_7 : STD_LOGIC_VECTOR (1 DOWNTO 0) ; --NUMB_CNT
BEGIN
----*********************************************************
--SYSTEN CONNECTION
CONNECTION : BLOCK
BEGIN
U1:KEYBOARD PORT MAP (CLK, KEY_IN, BU_1, BU_2, BU_3, BU_4, CLK_SCAN, BU_6 ) ;
--KEYBOARD PORT (clk, key_in, out_numb, out_func, flag_numb, flag_Func,clk_scan,C_DEBOUNCE);
U2:DISPLAY PORT MAP (CLK, BU_5, SELOUT, SEQOUT) ;
--( CLK, ACC, SEGOUT, SELOUT);
U3:CTRL PORT MAP (CLK, BU_1, BU_2, BU_3, BU_4, ENLOCK, BIBI, BU_5)
--(CLK, OUT_NUMB, OUT_FUNC, FLAG_NUMB, FLAG_FUNC, BIBI, NUMB_CNT, BCD_CODE, );
END BLOCK CONNECTION ;
END OF a ;
display :
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
--
--*********************************************
ENTITY display is
PORT(
www.751com.cn : OUT STD_LOGIC_VECTOR(6 DOWNTO 0); -- SEG7 Display O/P
SELOUT : OUT STD_LOGIC_VECTOR(3 DOWNTO 0) -- Select SEG7 O/P
);
END display ;
--
--*********************************************
ARCHITECTURE a OF display IS
SIGNAL DB : STD_LOGIC_VECTOR( 3 DOWNTO 0); -- Number Display Signal
SIGNAL SEG : STD_LOGIC_VECTOR( 6 DOWNTO 0); -- SEG7 Display Signal
SIGNAL SEL : STD_LOGIC_VECTOR( 3 DOWNTO 0); -- Select SEG7 Signal
Signal S : STD_LOGIC_VECTOR(1 DOWNTO 0) ; -- display scan sequence
BEGIN
Connection : Block
Begin
SELOUT <= SEL ; -- Seg7 Disp Selection
SEGOUT(6 DOWNTO 0) <= SEG; -- Seven Segment Display
S <= C_DISPLAY ;
DBOUT <= DB ;
End Block Connection;
--
--**********************************************
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