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DDS函数信号发生器的设计与实现 第4页

更新时间:2010-3-21:  来源:毕业论文
DDS函数信号发生器的设计与实现 第4页
sel_out<=sel;
da_1_out<=da_1;
da_2_out<=da_2;
da_3_out<=da_3;
da_4_out<=da_4; 
process (clk_s)
begin
   if (clk_s'event and clk_s='1')  then
     if Q>"1011111010111100001000000" THen Q<=(others =>'0');
       else q<=q+1;
     end if ;
   end if;
clk<=q(24);--500ms=2hz
clk2<=q(10);--扫描时钟
end process;

process (clk,mode)
begin
   if (clk'event and clk='1') then
    if mode='0' then mode_out_bak<=mode_out_bak+1;  
    end if;
   end if;
end process;
process (mode_out_bak)
begin
  case mode_out_bak is
 WHEN "000" =>
  da_1_sel<='1';--"灭灯"
   da_2_sel<='0';
  da_3_sel<='0';
   da_4_sel<='0';
   WHEN "001" =>
  da_1_sel<='0';
   da_2_sel<='1';--"灭灯"
  da_3_sel<='0';
   da_4_sel<='0';
 WHEN "010" =>
  da_1_sel<='0';
   da_2_sel<='0';
  da_3_sel<='1';--"灭灯"
   da_4_sel<='0';
   WHEN "011" =>
  da_1_sel<='0';
   da_2_sel<='0';
  da_3_sel<='0';
   da_4_sel<='1';--"灭灯"
 WHEN OTHERS =>
   da_1_sel<='0';
   da_2_sel<='0';
  da_3_sel<='0';
   da_4_sel<='0';
END CASE;
end process;
---------------------------------------------------------------
process (clk,add,sub,da_1_sel)
begin
if (clk'event and clk='1' ) then
   if (add<='0' and da_1_sel='1') then    --加100HZ
      if da_1="1001" then da_1<="0000";
      else
          da_1<=da_1+1;
       end if ;
    end if;
   if (sub<='0' and da_1_sel='1') then   
      if da_1="0000" then da_1<="1001";
      else
          da_1<=da_1-1;
       end if ;
    end if;
end if;
end process;
process (clk,add,sub,da_2_sel)    
begin
if (clk'event and clk='1' ) then
     if (add<='0' and da_2_sel='1') then    --加1KHZ
      if da_2="1001" then da_2<="0000";
      else
          da_2<=da_2+1;
       end if ;
    end if;
   if (sub<='0' and da_2_sel='1') then
      if da_2="0000" then da_2<="1001";
      else
          da_2<=da_2-1;
       end if ;
    end if;
end if;
end process;

process (clk,add,sub,da_3_sel)
begin   
www.751com.cn       end if ;
    end if;
   if (sub<='0' and da_3_sel='1') then
      if da_3="0000" then da_3<="1001";
      else
          da_3<=da_3-1;
       end if ;
    end if;
end if;
end process;
process (clk,add,sub,da_4_sel)
begin
if (clk'event and clk='1' ) then
     if (add<='0' and da_4_sel='1') then  --加100KHZ 
      if da_4="1001" then da_4<="0000";
      else
          da_4<=da_4+1;
       end if ;
    end if;
   if (sub<='0' and da_4_sel='1') then
      if da_4="0000" then da_4<="1001";
      else
          da_4<=da_4-1;
       end if ;
    end if;
end if;
end process;
--------------------------------------------------------------
PROCESS (CLK)
  BEGIN
   IF (DA_1_SEL='1' AND CLK='1')  THEN
       DA_1B<="1110";
   ELSE DA_1B<=DA_1;

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