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plc外文文献及翻译 第4页

更新时间:2016-8-21:  来源:毕业论文
Figure 3    PLC Scan Cycle

SELF TEST - Checks to see if all cards error free, reset watch-dog timer, etc. (A watchdog timer will cause an error, and shut down the PLC if not reset within a short period of time - this would indicate that the ladder logic is not being scanned normally).
INPUT SCAN - Reads input values from the chips in the input cards, and copies their values to memory. This makes the PLC operation faster, and avoids cases where an input changes from the start to the end of the program (e.g., an emergency stop). There are special PLC functions that read the inputs directly, and avoid the input tables.
LOGIC SOLVE/SCAN - Based on the input table in memory, the program is executed 1 step at a time, and outputs are updated. This is the focus of the later sections.
OUTPUT SCAN - The output table is copied from memory to the output chips. These chips then drive the output devices.

The input and output scans often confuse the beginner, but they are important. The input scan takes a snapshot of the inputs, and solves the logic. This prevents potential problems that might occur if an input that is used in multiple places in the ladder logic program 本文来自辣,文.论#文,网,加7位QQ324'9114找源文
www.751com.cn severe effects on complex programs that are developed later in the book. One side effect of the input scan is that if a change in input is too short in duration, it might fall between input scans and be missed.

When the PLC is initially turned on the normal outputs will be turned off. This does not affect the values of the inputs.

3 。1  The Input and Output Scans

When the inputs to the PLC are scanned the physical input values are copied into memory. When the outputs to a PLC are scanned they are copied from memory to the physical outputs. When the ladder logic is scanned it uses the values in memory, not the actual input or output values. The primary reason for doing this is so that if a program uses an input value in multiple places, a change in the input value will not invalidate the logic. Also, if output bits were changed as each bit was changed, instead of all at once at the end of the scan the PLC would operate much slower.

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