EDA宽带小步进频率综合器设计

摘要随着时代的进步，科技的高速发展。通信，雷达，航天等领域对频率源的要求越来越高。频率综合器在各个电子系统中起着越来越大的作用。所以设计高性能的频率综合器是现代通信的重要要研究方向。
   本文首先介绍了频率综合器的概况，着重介绍越来越流行的锁相环频率综合器的发展。然后主要介绍了锁相环的工作原理，主要介绍其锁频的机制原理，分析工作波形，频谱特性。接下来分别介绍了锁相环三个重要组成部分：鉴相器，环路滤波器，压控振荡器各自的工作原理及相位特性分析。然后，根据锁相环的工作原理结合本次课题的具体要求，利用EDA仿真软件设计出了一个宽频带（300MHz到3GHz），小步进（1MHz），低相位噪声（低于--75dBc@1kHz），低杂散指标（低于-55dBc）的频率综合器。对各种器件的选用，进行了大量的仿真和数据比较，确保设计的合理性和最优化。最后，对设计好的锁相环频率综合器用单片机进行编程，确保其实际的使用。19952
关键词：锁相环鉴相器环路滤波器压控振荡器
毕业设计说明书（论文）外文摘要
Title Broadband small step frequency synthesizer design
Abstract
With the progress of time, the rapid development of science and technology . Communications, radar, aerospace and other fields on the frequency source increasingly demanding. Frequency synthesizer playing an increasingly large role in all electronic systems. Therefore, the design of high-performance frequency synthesizer is important to study the direction of modern communication.
   This paper describes the overview of the frequency synthesizer , highlighting the growing popularity of the PLL frequency synthesizer development . Then introduces the working principle of phase-locked loop , Introduces its locked mechanism , waveform analysis , spectral characteristics. The next phase locked loop were introduced three important components: a phase detector , loop filter , VCO their working principle and phase characteristics of the analysis . Then , according to the phase-locked loop works with specific requirements of this issue , the use of EDA simulation software to design a wide-band (300MHz to 3GHz), small step (1MHz), low phase noise ( below - 75dBc @ 1kHz), low spurious indicators ( less than -55dBc) frequency synthesizer . To use a variety of devices , a lot of simulation and data comparison , ensure the rational design and optimization . Finally, phase-locked loop frequency synthesizer designed Used microcontroller programming , to ensure that their actual use .
Keywords：Phase-Locked Loop PD LF VCO
目   次
1 引言    1
1.1 频率综合器概述    1
1.2 锁相环频率综合器概述    1
1.3 论文要求    2
2 锁相环概述    3
2.1 锁相环工作原理    3
2.2 鉴相器    7
2.3 压控振荡器    8
2.4 环路滤波器    9
2.5 分频器：    12
3 锁相环频率综合器设计    13
3.1 鉴相器芯片选择设计    13
3.2ADF4350芯片简介    15
3.3 分频选择设计    17
3.4 环路滤波器的选择设计    19
3.5ADF4350压控振荡器    22
3.6 晶振和功率放大器    25
3.7 电路原理图和PCB图    27
3.8数据    分析    28
3.9   控制程序    29
结论    32
致谢    33 EDA宽带小步进频率综合器设计:http://www.751com.cn/tongxin/lunwen_11537.html