频率是电子设计领域中的基础参数之一。随着技术的不断进步，工业与学术研究中对测频的要求也在不断增强、增多。人们对更快、更精准、更稳定、集成化更高的测频仪器的需求也越来越高。 本课题研究的是基于 FPGA 的全同步数字频率计的设计与仿真。通过对原有测频原理的学习与分析，提出对测频出现的±1的误差的解决方案。采用被测信号、标准信号、闸门信号同步的策略，解决传统测频出现的计数不准问题，使测频变得更加精确。本次设计使用 VHDL语言与电路原理图共同完成，并在Quartus II软件上进行了测试与仿真。实验结果表明，此种方法准确可靠，测频精度得到了提高。 59681
毕业论文关键词 FPGA VHDL 全同步 频率计 测频方法
Title Design of Complete Synchronous Digital Frequency Meter Based on FPGA
Abstract Frequency is the basis parameter for the field of electronic design. A variety of equipment and methods have been invented out. However, as technology and the development of integrated circuits continues to progress, industrial and academic research on the frequency measurement requirements are also growing and increasing. People need faster, more accurate, more stable and more integrated frequency measurement instruments. This research is a design of complete synchronous digital frequency meter based on FPGA. By learning and analysis of the original principles of measuring frequency, a solution to the problem of error of ± 1 has been proposed. Synchronizing the signal, the standard signal and the gate signal, the problem of counting allowed in the traditional method of measuring frequency has been solved. AND the frequency measurement accuracy has been increasing. This digital frequency meter is designed by VHDL language and circuit diagrams. And the design has been tested and simulated in the Quartus II software. Experimental results show that this method is accurate and the frequency measurement accuracy is improved.
Keywords FPGA VHDL complete synchronous frequency meter measure method
目录
1绪论.1
1.1课题背景目的与意义1
1.2频率计发展概述...2
1.3本次课题的研究内容...2
1.4论文结构...2
2FPGA与EDA技术概要3
2.1FPGA技术的概述..3
2.2VHDL语言及其概述..4
2.3QuartusII软件介绍7
3全同步测频原理与对比分析.7
3.1直接测频法的原理与分析7
3.1.1M法7
3.1.2T法8
3.2等精度测频法的原理与分析8
3.3全同步测频方法的原理与分析.10
4全同步数字频率计的FPGA实现.12
4.1总原理介绍.12
4.2脉冲同步电路..12
4.2.1脉冲同步电路原理.12
4.2.2脉冲同步电路仿真结果.13
4.2.3脉冲同步电路仿真分析.13
4.3计数器..14
4.3.1计数器原理.14
4.3.2计数器仿真结果.14
4.3.3计数器仿真分析.15
4.4锁存器..16
4.4.1锁存器原理.16
4.4.2锁存器仿真结果.16
4.4.3锁存器仿真分析.16
4.5乘法器..17
4.5.1乘法器原理.17
4.5.2乘法器仿真结果.20
4.5.3乘法器仿真分析.21
4.6除法器..21
4.6.1除法器原理.21
4.6.2除法器仿真结果.23
4.6.3除法器仿真分析.24
4.7控制器.24
4.7.1控制器原理.24
4.7.2控制器仿真结果.26
4.7.3控制器仿真分析.26
4.8顶层文件.26 FPGA全同步数字频率计的设计:http://www.751com.cn/tongxin/lunwen_64975.html