摘要本文介绍了SRIO标准以及物理层、传输层、逻辑层协议，介绍了通过SRIO接口进行通信的原理和实现方法。基于SRIO实现FPGA与DSP高速通信的方法分为两大部分：首先是硬件设计，DSP作为主处理器，FPGA为协处理器，由于二者信号处理速率存在很大差异，因此需要通过收发器来实现二者互联，硬件部分包括信号转接板，SRIO接口硬件设计。其次是软件调试，方案一是基于FPGA设计SRIO各层通信协议，驱动SRIO接口硬件电路。由于方案一开发时间较长，此次我们采用方案二，即采用Xilinx-5开发板自带的SRIO IP内核，通过配置SRIO IP内核实现SRIO端口功能。分别配置并驱动Xilinx-5和TMS320C667的SRIO 端口来实现数据通信。9379
关键词  SRIO  Xilinx-5  TMS320C6678    Altium Designer   CCS
毕业设计说明书（论文）外文摘要
Title    High Data Transmission System Design Between DSP and    FPGA Based on the Serial Rapid IO                                          
Abstract
This paper introduces SRIO standard as well as the physical layer, transport layer, logic layer protocol. Introduced the principle and Realization method of the communication with the SRIO interface. The communication method is pided into two parts. In which the Hardware designing comes the first .The DSP works as the main processor and the FPGA works as a coprocessor. Because of the different rate between the two device, a transceiver is needed to achieve the two interconnection. The hardware part comprises a signal adapter plate and a SRIO interface .Secondly is the software debugging. One of the design schemes is write the SRIO layer communication protocols to derive the SRIO interface. However ,it takes too much time ,so the other design scheme is adapted. Using SRIO IP kernel of the Xilinx-5 development board, by configuring the SRIO IP kernel to derive SRIO interface. Configuration and  driving the SRIO of Xilinx-5 and TMS320C667 respectively to realize data communication.
Keywords  SRIO  Xilinx-5  TMS320C6678    Altium Designer   CCS
目 次
1.引言    6
1.1研究背景及意义    6
1.2 主要内容    7
2．SRIO简介    7
2.1 SRIO结构    7
2.2 SRIO特性    8
2.3 SRIO 各层协议简介    10
2.3.1 物理层协议简介    10
2.3.2 传输层协议简介    12
2.3.3 逻辑层协议简介    13
3 系统总体设计    14
3.1 系统总体结构    14
3.2 系统开发工具    15
3.2.1 Altium Designer简介    15
3.2.2 Quartus II简介    16
3.2.3 Code Composer Studio v5简介    16
4 系统硬件设计    17
4.1 芯片选择与介绍    17
4.1.1 FPGA控制电路    17
4.1.2 串并转换器    18
4.1.3 电源模块    20
4.1.4 时钟模块    21
4.2电压转换与高速电路注意事项    22
4.2.1电压转换    22
4.2.2 高速电路规则    23
4.3 硬件设计——SRIO    25
4.3.1 电源模块    25
4.3.2 时钟模块    28
4.3.3 收发器配置    29
4.3.4 FPGA配置    30
4.3.5 开关指示灯    32
4.4 SATA及SMA转接板    33 采用Serial Rapid IO机制的DSP与FPGA高速数据传输系统设计:http://www.751com.cn/tongxin/lunwen_8091.html