5.1 Hardware architecture
Figure 7 shows that the architecture of the control unit of the C4G is derived from the standard C3G control unit by integrating additional computing and interface boards. The C3G control unit is based on the VME-bus and comprises two processing boards, the robot CPU (RBC) and the servo CPU (SCC). The SCC is a multiprocessor board equipped with Motorola 68020/68882 CPUs and with Texas 320C25 DSP. The Motorola CPUs perform trajectory generation, in either joint or Cartesian space, and kinematic inversion, both every 10 msec; the DSP executes position set-point micro-interpolation and joint position control, at a sampling interval of 1 msec.
The additional boards are the sensor-based control CPU (SBC) and I/O boards to interface exteroceptive sensors. The SBC is in charge of supplying the additional computing power required to execute the new control functions. It gets sensor data from dedicated I/O boards plugged in the VME bus, and exchanges data with the RBC and SCC through the shared memory on the RBC, and it has to compute the corrections to position set points for hybrid control. The SBC hardware design has not been camed out; a second RBC or SCC would, rather, be used to eliminate the need for the board design and reduce spare-part costs.
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关键词:机器人控制;工业机器人;控制三要素;开放式控制系统;设计方法