摘要本次课题设计是FPGA在电机测速中的应用，以Quartus II软件为平台，采用Verilog HDL语言和原理图法进行设计，最后通过7位的数码管来实现电路的动态显示功能。设计的系统可以对转速信号进行测量，并对此进行分析，然后通过运算部分得出电机转速结果，通过数码管显示。本设计以FPGA原理为核心，采用FPGA芯片为载体，通过软件编程的设计方法，简化硬件电路的设计，将硬件电路全部集成到FPGA芯片中，是对硬件电路的一种高度集成。通过软件对设计逻辑电路，将逻辑电路组成一个可以实现特定功能的组合逻辑电路，最终进行编译仿真，下载测试。设计结果与设想的目标一致，并且该系统运行稳定，可靠性高，使用方便。41866
本文同时还介绍了FPGA的国内外研究现状、工作原理以及结构功能等特点，简单介绍光电编码器以及光电耦合器原理，Quartus II软件设计流程等。设计流程包含对电机信号的采集，随后对采集的信号进行倍频、鉴向、计数、锁存、运算、译码显示等过程，最终所得到的数据通过数码管动态显示。
该论文有图29幅，参考文献29篇。
毕业论文关键词：FPGA 电机测速 动态显示 数码管
Application of FPGA in motor speed measurement
Abstract
This topic design is the application of FPGA in the motor speed, the Quartus II software as a platform, using Verilog HDL language and schematic diagram design, the 7 bit digital tube display function of dynamic circuit can be realized. The design of the system can measuring the amount of the speed signal, and carries on the analysis regarding this, and obtains a motor speed results through the operation part, through the digital tube display. The design principle of FPGA as the core by FPGA chip as the carrier, through the design method of software programming, simplify the hardware circuit design, the hardware circuits are integrated in FPGA The chip, the hardware circuit of a highly integrated. Through the software on the design of the logic circuit, the logic circuit is composed of a specific function of a combinational logic circuit can be achieved compiling the final simulation, download the test. Consistent with the goals of the design results and ideas, and the system is running stable, high reliability, easy to use.
At the same time, this paper also introduces the process of FPGA of domestic and foreign research status, working principle, structure, function and features a brief introduction to the photoelectric encoder and the principle of photoelectric coupler, Quartus II software design process. Design process includes the acquisition of motor signal, then the signal acquisition is doubled, learning to count, latch, operations, decoding display, finally found the data through the digital tube dynamic display.
The paper has 29figures, 29 references.
Key words: FPGA motor speed dynamic display digital tube
目 录
摘要 I
Abstract II
目录 III
图清单 V
1 绪 论 1
1.1 课题研究的目的和意义 1
1.2 课题的研究现状及分析 1
1.3课题的主要任务与要求 2
2 测速技术平台 3
2.1 FPGA的工作原理 3
2.2 EP3C25F324C8芯片 3
2.3 FPGA的优点 4
2.4 VerilogHDL语言 FPGA在电机测速中的应用:http://www.751com.cn/zidonghua/lunwen_42081.html