- 上一篇：MATLAB的跳频通信系统仿真
- 下一篇：基于SEP3203的触屏MP3播放实现
摘要当今社会是信息化、互联网化的社会，在这样的社会背景下通信技术的发展十分迅速，现在普遍采用的是移动通信和数字通信系统，在这类通信系统中，软件无线电技术被广泛地应用。而数字下变频技术又在软件无线电技术领域中占据重要地位，它是着A/D采样前段与后续DSP处理系统之间的桥梁，对于如何去实现数字下变频，学术界中有各种各样的设计构思。经过实际地检验，利用FPGA实现数字下变频具有更高的灵活度和更低廉的成本，已经成为了实现数字下变频的主要方法。64915
首先研究了信号正交分解理论、信号采样理论、多速率信号处理理论等数字下变频的理论基础，然后进一步深入研究了数字下变频关键模块NCO与FIR滤波器的工作原理和实现算法。最后，调用QuartusII IP核及运用verilog HDL语言对数字下变频系统的各模块进行编程实现，并在系统硬件平台Altera EP3SE110上以90MHz采样频率，对中频频率为70MHz的信号实现了下变频处理，成功设计了基于FPGA的数字下变频。
毕业论文关键词 DDC NCO FIR滤波器 FPGA
毕业设计说明书（论文）外文摘要
Title Design of Digital Down Converter based on FPGA
Abstract With the rapid development of microelectronic technology, computer technology and communication technology, digital down converter(DDC) has been widely used as a bridge which links the front-end ADC device and the back-end universal DSP device in the system of software defined radio. And the design of DDC based on FPGA has higher flexibility and lower costs, and thus, has become the main method of DDC implementation.
Firstly, this thesis studied the base theory related to DDC such as signal orthogonal decomposition theory, sampling theory and multi-rate signal processing. Then we introduced the structure and the working principle of DDC. Based on this, we analyzed the main factors which impact the DDC performance and the working principle and implementation algorithm of NCO and FIR filter that are the key modules in DDC. Finally, we used the QuartusII IP core and the Verilog HDL language to design and program modules of DDC and did down-conversion processing to a signal whose intermediate frequency is 70MHz with a sampling frequency of 90MHz on the hardware platform based on Altera EP3SE110.Successfully we designed the DDC based on FPGA.
Keywords DDC NCO FIR filter FPGA
目 次
1 绪论 1
1．1 数字下变频技术研究背景 1
1．2 本论文的研究任务及主要结构 3
2．1 正交变换原理 4
2．2 信号的数据抽样原理 8
2．3 多速率信号抽取原理 10
3 数字下变频的模块实现 15
3．1 数字下变频的总体实现 16
3．2 NCO模块的原理及实现 16
3.3 FIR数字滤波器的原理及实现 21
4．1 仿真器件的介绍 23
4．2 数字下变频各模块的实现 24
4．3 系统硬件测试结果及分析 30
结 论 34
致 谢 35
参考文献